| Submission Open for Jan-Dec-2024 |
| Last Date of Submission : |
| 20th, April-2024 |
| Acceptance Notification : |
After Peer Review |
| Last Date of Publication : |
| 30th, April-2024 |
Volume10 ISSUE 1 Call for Conference Special Issue Archive (Recent Update ISSUE)
| S.NO | TITLE | PAGE NO | DOWNLOAD | |
| IJVDCS 20 | Implementation of Multiplexer Based Digital Comparator for Low Power Applications Authors:THURPUNATI SIVAMMA, C.NAGENDRA REDDY |
0113-0118 |
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| IJVDCS 21 | Telescopic OTA Based Design of 5th Order Chebyshev Low Pass Filter Authors:ARVIND SINGH RAWAT, VIKALP JOSHI, SUDHIR JUGRAN, DR.SANJAY SINGH |
0119-0121 |
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| IJVDCS 22 | Design and Simulation Five Port Router using Verilog HDL Authors:CH.KARTHIK, R.S.UMA SUSEELA |
0122-0126 |
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| IJVDCS 23 | Variable Latency-Carry Select Adder (VL-CSA) Designs for Low Power and NBTI Tolerance using Time Domain Temperature Sensor Authors:E.SHARMILA, R.MEENA KANIMOZHI, K.NIVETHA |
0127-0131 |
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| IJVDCS 24 | Fault Tolerant Approaches for Ultra Low Power System Design Authors:MANTHA ANIL SRIMANTH, ASHWINI DESHMUKH |
0132-0135 |
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| IJVDCS 25 | Configurable Programmable BIST for Memory Authors:M. SANDHYA RANI, M. SUVARNA |
0136-0139 |
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| IJVDCS 26 | Efficiency of Power and Latency in Cache System using Way Tag Architecture under Write through Policy Authors:K.PRAVEENA, K.PRASANTH |
0140-0146 |
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| IJVDCS 27 | A Novel Design for Quantum-dot Cellular Automata Cell Adders Authors:KRISHNA SRIKANTH A, DASARI KIRAN SUNDAR |
0147-0150 |
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| IJVDCS 28 | Saliency-Aware Video Compression Authors:V. MAHESH, P. PRAVEEN KUMAR |
0151-0156 |
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| IJVDCS 29 | Implementation of Fully Pipeline DBCD Multiplier using Radix-10 Recoder Authors:K. ASHOK KUMAR, P. CHARAN SIDDARTHA REDDY, SHAIK SAMEER |
0157-0163 |
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